Category: General

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Data alignment and caches

Here’s the graph of a toy benchmark1 of page-aligned vs. mis-aligned accesses; it shows a ratio of performance between the two at different working set sizes....

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PCA is not a panacea

Earlier this year, I interviewed with a well-known tech startup, one of the hundreds of companies that claims to have harder interviews, more challenging work, and...

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Why hardware development is hard

In CPU design, most successful teams have a fairly long lineage and rely heavily on experienced engineers. When we look at CPU startups, teams that have...

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Randomize HN

You ever notice that there’s this funny threshold for getting to the front page on sites like HN? The exact threshold varies depending on how much...

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Writing safe Verilog

Troll? That’s how people write Verilog1. At my old company, we had a team of formal methods PhD’s who wrote a linter that typechecked our code,...

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Verilog is weird

Verilog is the most commonly used language for hardware design in America (VHDL is more common in Europe). Too bad it’s so baroque. If you ever...

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About danluu.com

About The Blog This started out as a way to jot down thoughts on areas that seem interesting but underappreciated. Since then, this site has grown...

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